nds/timers.h File Reference

Contains defines and macros for ARM7 and ARM9 timer operation. More...

#include <nds/jtypes.h>

Defines

#define TIMER_FREQ(n)   (-0x2000000/(n))
 A macro that calculates TIMER_DATA(n) settings for a given frequency of n.
#define TIMER_FREQ_64(n)   (-(0x2000000>>6)/(n))
 A macro that calculates TIMER_DATA(n) settings for a given frequency of n.
#define TIMER_FREQ_256(n)   (-(0x2000000>>8)/(n))
 A macro that calculates TIMER_DATA(n) settings for a given frequency of n.
#define TIMER_FREQ_1024(n)   (-(0x2000000>>10)/(n))
 A macro that calculates TIMER_DATA(n) settings for a given frequency of n.
#define TIMER0_DATA   (*(vuint16*)0x04000100)
 Same as TIMER_DATA(0).
#define TIMER1_DATA   (*(vuint16*)0x04000104)
 Same as TIMER_DATA(1).
#define TIMER2_DATA   (*(vuint16*)0x04000108)
 Same as TIMER_DATA(2).
#define TIMER3_DATA   (*(vuint16*)0x0400010C)
 Same as TIMER_DATA(3).
#define TIMER_DATA(n)   (*(vuint16*)(0x04000100+((n)<<2)))
 Returns a dereferenced pointer to the data register for timer number "n".
#define TIMER0_CR   (*(vuint16*)0x04000102)
 Same as TIMER_CR(0).
#define TIMER1_CR   (*(vuint16*)0x04000106)
 Same as TIMER_CR(1).
#define TIMER2_CR   (*(vuint16*)0x0400010A)
 Same as TIMER_CR(2).
#define TIMER3_CR   (*(vuint16*)0x0400010E)
 Same as TIMER_CR(3).
#define TIMER_CR(n)   (*(vuint16*)(0x04000102+((n)<<2)))
 Returns a dereferenced pointer to the data register for timer control Register.
#define TIMER_ENABLE   (1<<7)
 Enables the timer.
#define TIMER_IRQ_REQ   (1<<6)
 Causes the timer to request an Interupt on overflow.
#define TIMER_CASCADE   (1<<2)
 When set will cause the timer to count when the timer below overflows (unavailable for timer 0).
#define TIMER_DIV_1   (0)
 Causes the timer to count at 33.514Mhz.
#define TIMER_DIV_64   (1)
 Causes the timer to count at (33.514 / 64) Mhz.
#define TIMER_DIV_256   (2)
 Causes the timer to count at (33.514 / 256) Mhz.
#define TIMER_DIV_1024   (3)
 Causes the timer to count at (33.514 / 1024)Mhz.

Detailed Description

Contains defines and macros for ARM7 and ARM9 timer operation.

The timers are fed with a 33.4 MHz source on the ARM9. The ARM7 timing hasn't been tested yet, but is likely to be the same.

Define Documentation

#define TIMER0_CR   (*(vuint16*)0x04000102)

Same as TIMER_CR(0).

#define TIMER0_DATA   (*(vuint16*)0x04000100)

Same as TIMER_DATA(0).

#define TIMER1_CR   (*(vuint16*)0x04000106)

Same as TIMER_CR(1).

#define TIMER1_DATA   (*(vuint16*)0x04000104)

Same as TIMER_DATA(1).

#define TIMER2_CR   (*(vuint16*)0x0400010A)

Same as TIMER_CR(2).

#define TIMER2_DATA   (*(vuint16*)0x04000108)

Same as TIMER_DATA(2).

#define TIMER3_CR   (*(vuint16*)0x0400010E)

Same as TIMER_CR(3).

#define TIMER3_DATA   (*(vuint16*)0x0400010C)

Same as TIMER_DATA(3).

#define TIMER_CASCADE   (1<<2)

When set will cause the timer to count when the timer below overflows (unavailable for timer 0).

#define TIMER_CR ( n   )     (*(vuint16*)(0x04000102+((n)<<2)))

Returns a dereferenced pointer to the data register for timer control Register.

Example Usage: TIMER_CR(x) = TIMER_ENABLE | TIMER_DIV_64;

Possible bit defines:

See also:
TIMER_ENABLE

TIMER_IRQ_REQ

TIMER_DIV_1

TIMER_DIV_64

TIMER_DIV_256

TIMER_DIV_1024

#define TIMER_DATA ( n   )     (*(vuint16*)(0x04000100+((n)<<2)))

Returns a dereferenced pointer to the data register for timer number "n".

See also:
TIMER_CR(n)

TIMER_FREQ(n)

TIMER_DATA(n) when set will latch that value into the counter. Everytime the counter rolls over TIMER_DATA(0) will return to the latched value. This allows you to control the frequency of the timer using the following formula:
TIMER_DATA(x) = -(0x2000000/(freq * divider));

Example Usage: TIMER_DATA(0) = value; were 0 can be 0 through 3 and value is 16 bits.

#define TIMER_DIV_1   (0)

Causes the timer to count at 33.514Mhz.

#define TIMER_DIV_1024   (3)

Causes the timer to count at (33.514 / 1024)Mhz.

#define TIMER_DIV_256   (2)

Causes the timer to count at (33.514 / 256) Mhz.

#define TIMER_DIV_64   (1)

Causes the timer to count at (33.514 / 64) Mhz.

#define TIMER_ENABLE   (1<<7)

Enables the timer.

#define TIMER_FREQ ( n   )     (-0x2000000/(n))

A macro that calculates TIMER_DATA(n) settings for a given frequency of n.

Use the appropriate macro depending on clock divider:

Clock divider is controlled by TIMER_CR(n)

Example Usage:

TIMER_DATA(0) = TIMER_FREQ(freq_in_hz);
TIMER_CR(0) = TIMER_DIV1 | TIMER_ENABLE;

Max frequency is: 33554432Hz
Min frequency is: 512Hz

#define TIMER_FREQ_1024 ( n   )     (-(0x2000000>>10)/(n))

A macro that calculates TIMER_DATA(n) settings for a given frequency of n.

Use the appropriate macro depending on clock divider:

Clock divider is controlled by TIMER_CR(n)

Example Usage: TIMER_DATA(x) = TIMER_FREQ_1024(freq_in_hz)

Max frequency is: 32768Hz
Min frequency is: 0.5Hz

#define TIMER_FREQ_256 ( n   )     (-(0x2000000>>8)/(n))

A macro that calculates TIMER_DATA(n) settings for a given frequency of n.

Use the appropriate macro depending on clock divider:

Clock divider is controlled by TIMER_CR(n)

Example Usage: TIMER_DATA(x) = TIMER_FREQ_256(freq_in_hz)

Max frequency is: 131072Hz
Min frequency is: 2Hz

#define TIMER_FREQ_64 ( n   )     (-(0x2000000>>6)/(n))

A macro that calculates TIMER_DATA(n) settings for a given frequency of n.

Use the appropriate macro depending on clock divider:

Clock divider is controlled by TIMER_CR(n)

Example Usage: TIMER_DATA(x) = TIMER_FREQ_64(freq_in_hz)

Max frequency is: 524288Hz
Min frequency is: 8Hz

#define TIMER_IRQ_REQ   (1<<6)

Causes the timer to request an Interupt on overflow.

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